Exemplary embodiments relate to the data input circuit of a nonvolatile memory device and, more particularly, to the data input circuit of a nonvolatile memory device operating at a high speed.
In a data input operation, a nonvolatile memory device receives normal data and redundancy data through global I/O lines, temporarily stores the received data in a pipe register, and sends the stored data to a corresponding memory cell block for being programmed.
In order to increase the operation speed of the nonvolatile memory device, the received data are to be stored in the pipe register in proportion to the speed of the normal data and redundancy data sequentially received through global I/O line. In conventional nonvolatile memory devices, the data input speed is determined by the storage speed of a pipe latch because a pipe latch is coupled/assigned to a global data line.